Generally, integrated circuits comprise semiconductor devices, such as transistors, capacitors, and the like, formed on and within a wafer. The trend in the semiconductor industry is towards the miniaturization or scaling of integrated circuits, in order to provide smaller integrated circuits and improved performance, such as increased speed and decreased power consumption.
Conventionally, a gap fill dielectric material is deposited over semiconductor devices after their formation in front-end-of-line (FEOL) processing. An interlayer dielectric material is then formed over the gap fill material before contacts and interconnect structures are formed. Typically, the gap fill dielectric material is a silicon oxide deposited by a high aspect ratio polymer (HARP) process. Further, the interlayer dielectric material is often a silicon oxide deposited by a plasma-deposition process from tetraethoxysilane (TEOS). These two dielectric materials have different removal rates for the conventionally used chemical mechanical planarization (CMP) processes and the reactive ion etch (RIE) processes in integrated circuit fabrication. Further, the HARP oxide typically is formed with a large topology variation, particularly evident where the HARP oxide lies over gate structures. As a result of the topology variation and etch rate differences, conventional processing using RIE processes after CMP processes often leads to an undesirable etching of HARP oxide material underlying TEOS oxide material, and can result in dishing, electrical shorting, and metal line collapse. These defects can lead to load yield for fabrication processes and increased costs.
Accordingly, it is desirable to provide integrated circuits and methods for fabricating integrated circuits having improved gap fill dielectric and improved electrical performance. It is further desirable to provide integrated circuits and methods suitable for fabricating integrated circuits in which the risk of defect generation is minimized and the fabrication is cost effective. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.